File:PCI-host-controller-in-x86-architecture.png
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In the x86 architecture, the PCI host controller is integrated into the Southbridge. The Processor/Northbridge/Southbridge, produced by a single vendor, exposes the PCI host controller (and, by extension, the PCI buses) to software via port-mapped IO, memory-mapped IO, and interrupts.
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| Date/Time | Thumbnail | Dimensions | User | Comment | |
|---|---|---|---|---|---|
| current | 15:34, 20 February 2013 |  | 562 × 894 (20 KB) | Intx13 (Talk | contribs) | (In the x86 architecture, the PCI host controller is integrated into the Southbridge. The Processor/Northbridge/Southbridge, produced by a single vendor, exposes the PCI host controller (and, by extension, the PCI buses) to software via port-mapped IO, mem) |
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