IA32 Architecture Family

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The following tables and notes constitute an overview of the x86-based processors produced (most of which are still available in some form today). These tables are intended as a guide only, the most reliable way to determine CPU features (amongst newer CPUs at least) is by using CPUID.

The table is fairly easy to read, but a note on some of the values would be helpful. Values marked with Yes are available in all CPUs in that series, no exceptions. Items marked with No are not available at all. Items marked with Maybe are available in some of the CPUs (maybe higher spec'd machines, for instance the 486DX, or in later processor steppings). Items marked with a ? are yet to be researched or confirmed. If you have some information, let us know!

Most of the information in this table comes from Wikipedia, with some coming from the Intel and AMD processor manuals.


Intel Processors

These processors from Intel use the CPUID string "GenuineIntel".

Release Date FPU (80x87) Protected Mode SMP MMX PAE SSE Hyper-threading EM64T/AMD64 Notes
8086 1978 Optional No No No No No No No, 16-bit only First processor of the long-lasting x86 ISA, only supporting 16-bit real mode and 64KB segmentation. Eight 16-bit general-purpose registers, four 16-bit segment registers, a 16-bit instruction pointer, and a 16-bit flags register. 256 interrupts available and a 64KB I/O space.
80186 1982 Optional No No No No No No No, 16-bit only Designed and intended for embedded systems. First x86 processor with ENTER/LEAVE instructions, as well as PUSHA/POPA, a few other instructions, and immediate modes for PUSH, IMUL, and shift instructions. Exception 06h (Invalid Opcode, #UD) introduced with the UD2 "instruction".
80286 1982 Optional 16-bit only No No No No No No, 16-bit only First x86 processor with a "protected mode" and a 24-bit address bus and can not go from pmode to real mode without a CPU reset. It has better performance in real mode than the previous 16-bit Intel processors. Designed for multitasking and multi-user systems.
80386 1985 Optional Yes No No No No No No Successor to the 80286, the Intel 386 is the first processor of the IA32 architecture. It has 32 bit wide registers, supports 4 kByte paging, and a flat memory model in addition to the segmented memory model of the 80286.
80486 1989 Optional Yes Yes No No No No No The 486 integrates a 80x87 FPU on-chip (not the 486SX though), and supports power saving functions (System Management Mode, Stop Clock, Auto Halt Powerdown). It also supports SMP with an external APIC (though rare), and adds pipelining and on-chip caches, as well as related opcodes such as INVD, INVLPG, XADD and CMPXCHG.
Pentium 1993 Yes Yes Yes No No No No No The Pentium integrates an APIC (which may be permanently disabled by the BIOS), and supports PSE (4 MiB pages). It also supports 2-way multiprocessing.
Pentium Pro 1995 Yes Yes Yes No Yes No No No The Pentium Pro supports PAE (36 bit physical address space with 2 MiB and/or 4 KiB pages), but does not have the MMX registers of the Pentium.
Pentium MMX 1996 Yes Yes Yes Yes No No No No The Pentium MMX is very similar to the original Pentium CPU, but includes MMX SIMD registers (single instruction, multiple data). It doesn't seem logical, but the Pentium MMX was released after the Pentium Pro.
Pentium II 1997 Yes Yes Yes Yes Yes No No No The Pentium II again supports MMX (as well as PAE), as well as additional low-power states: AutoHALT, Stop-Grant, Sleep, and ~DeepSleep.
Pentium II Xeon 1998 Yes Yes Yes Yes Yes No No No The Xeon supports 4/8/+ way multiprocessing.
Pentium III 1999 Yes Yes Yes Yes Yes SSE No No Available in speeds from 450MHz to 1400MHz, the Pentium III was the first to support SSE (128 bit packed single FP SIMD). Other than this it was widely similar to the Pentium II Deschutes.
Pentium III Xeon 1999 Yes Yes Yes Yes Yes SSE No No
Pentium IV 2000 Yes Yes Yes Yes Yes SSE2* Yes Maybe Intel added both SSE3 and "EMT64/Intel 64" to the Prescott series.
Pentium M 2003 Yes Yes Yes Yes Yes SSE2 No No
Core 2003 Yes Yes Yes Yes Yes SSE3 No No
Xeon 51xx 2006 Yes Yes Yes Yes Yes SSSE3 Yes Yes
Core 2 2006 Yes Yes Yes Yes Yes SSE4.1 No Yes
Xeon 54xx 2007 Yes Yes Yes Yes Yes SSE4.1 No Yes
Core i-series 2008 Yes Yes Yes Yes Yes SSE4.2 Yes Yes
Atom 200/300 2008 Yes Yes Yes Yes Yes SSSE3 Yes Yes
Atom N-series 2008 Yes Yes Yes Yes Yes SSSE3 Yes Maybe Intel omitted 64-bit mode from the Diamondville (N-2xx) series, but included it with Pineview (N-4xx).
Atom Z-series 2008 Yes Yes Yes Yes Yes SSSE3 Yes No

Advanced Micro Device Intel-compatible Processors

AMD has been developing integrated circuits since the early 70's, they originally licensed the 80286 from Intel and branded it as the Am286. The company later went on to release its first Intel 386 clone, the Am386, in 1991.

The CPUID identifier string is "AuthenticAMD".

It is important to note that the "SSE" used by AMD and the "SSE" used by Intel may not be entirely compatible.

Release Date FPU (80x87) Protected Mode SMP MMX 3DNow! PAE SSE Hyper-threading EM64T/AMD64 Notes
Am386 1991 Optional Yes No No No No No No No AMD's first clone of the 32-bit i386 architecture, FPU was optional.




Yes Yes No No No No No No No AMD's 486 clone, 2x the cache size of most of Intel's 486 chips.
K5 1996 Yes Yes No No No No No No No AMD's first try at a Pentium-compatible CPU.
K6 1997 Yes Yes No Yes No No No No No Actually designed by NexGen (taken over by AMD), the K6 is a fully Pentium-compatible CPU. One notable instruction was the LOOPcc instruction, which executed in 2 cycles compared to a Pentium's 18, causing timing problems.
K6-2 1998 Yes Yes No Yes Yes No No No No AMD added 16 wait states to the execution of the LOOPcc and thus caused it to slow to the speed of a Pentium. They added a special case (speculation, might be coincidence) for the DEC (E)CX; Jcc combination, which is semantically equivalent with the LOOPcc instruction; since LOOPcc was faster on Intels, nobody used the DEC/Jcc combo there. So AMD kept the original speed for this combo, and specified in their optimization manuals that this was the preferred method over the LOOPcc instruction.

The K6-2 also featured the 3DNOW! technology, which was "MMX using floating point numbers", and multiplexed (again) on the floating point registers. It was largely compatible with the P2.

K6-3 1999 Yes Yes No Yes Yes No No No No This design was fully P2 compatible.

The K6-3 suffered from a bottleneck at the instruction decode unit (which converts the x86 instructions to native instructions). While it did have 3 execution units of each type (ALU / MMX / loadstore), they were not used much at all since the instruction decode unit could not keep up.

Athlon 1999 Yes Yes No Yes Yes Yes No No No
Athlon XP/MP 2001 Yes Yes Maybe Yes Yes Yes SSE No No Athlon XP (starting with Palomino) introduced SSE. SMP capable chips were branded as Athlon MP.
Athlon 64 2003 Yes Yes No Yes Yes Yes SSE3 No Yes
Athlon 64 X2 2005 Yes Yes Yes Yes Yes Yes SSE3 No Yes
Phenom 2007 Yes Yes  ? Yes Yes Yes SSE4a No Yes

AMD64 based CPU's

These processors all support the entire IA32 family natively. AMD created a new processor, with 48-bit memory addressing and 64-bit calculations, being very compatible with the old style CPU's. So compatible, that the core for 32-bit and 64-bit is essentially identical, aside from the size of calculations and the support of a few encodings that were effectively redundant. They removed a few 1-byte opcodes (about 20 in total, including all 1-byte INC and 1-byte DEC instructions) to make room for a new REX prefix. They modified the core to use 16 registers instead of 8, added a load of new names, got the old software working, and optimized the 32-bit performance.

Other CPU vendors making similar chips


Cyrix was a well-known CPU vendor from the 386 years (and slightly before), up to Pentium II times, when it more or less vanished inside Via. Via now uses the name as a CPU name (not making it clearer), but this section is about the original Cyrix CPU's. The processors supporting CPUID call it "CyrixInstead".

Cyrix 387

This isn't actually a processor but an FPU. It was the fastest coprocessor to the 386 to be found, and was even very usable aside a 486-SX.

Cyrix 4x86

A processor that had the abilities of a 486. The first generation plugged into 386 sockets giving greater speeds without requiring extra hardware updates. Later editions could also be used on 486 motherboards.

Cyrix 5x86

A processor that performed as a 486 and was socket-compatible. It features some of the Pentium's abilities, but not all (such as cmpxchg8b).

Cyrix 6x86 / M1

This processor is, even though the name suggests otherwise, compatible with the 586 (Pentium). It didn't contain any of the MMX or PPro features. It performed slightly better per cycle compared to the Pentium Pro, and was thus given ratings. The performance of floating point operations was lower than that of the Pentium Pro.

Cyrix 6x86MX / M2

Was a Pentium MMX compatible processor, also using ratings. It was again socket-compatible to the Pentium MMX and the older Pentiums (without MMX). It supported a few features from the Pentium Pro, among which the very usable CMOVcc set.


This was a chip that, apart from the CPU, included several peripherals on-chip including graphics and audio devices.

The company was bought by National Semiconductor, who sold the trademark to VIA. The MediaGX was developed further and was eventually bought by AMD who marketed it as the Geode.

Rise Technologies

A company reputedly producing Pentium-compatible chips, without MMX. Little detail is known, but the CPUID identifier string was "RiseRiseRise", or the same in all 3 dwords (making a search for it very easy).

See Also



AT,XT and PC

External Links

  • x86 on Wikipedia
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