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descDate Name Thumbnail Size User Description Versions
23:37, 31 July 2017Apbstatediagram.png (file)106 KBGravaera (APB state transitions)1
23:23, 28 March 2017Qemu-barebones-x86-c.png (file)35 KBZesterer (A screenshot of a successfully booted x86 bare-bones kernel.)1
21:40, 14 March 2017Dawn.png (file)549 KBGeri (Screenshot of Dawn operating system.)1
05:13, 18 February 2017Toaruos screenshot.png (file)834 KBKlange 4
06:53, 5 January 2017BoneOS1.png (file)20 KBRealamanuel2 (BoneOS Operating System ScreenShot)1
21:26, 29 November 2016Tupai-0-1-0.png (file)8 KBZesterer (A screenshot of Tupai 0.1.0)1
06:49, 12 August 2016Cromwell Firmware on an Xbox.jpg (file)340 KBHalofreak1990 1
03:24, 3 August 2016Beelz 3.png (file)40 KBVercas (Testing once again.)1
02:49, 3 August 2016Xbox-Console-Open-Drives.jpg (file)130 KBHalofreak1990 1
13:25, 8 July 2016Vga mode.gif (file)12 KBAkasei 1
22:51, 8 April 2016Win32 lpthandler exe 0000.jpg (file)42 KB~ (Simple example of parallel port manipulation and programming in Windows.)1
12:42, 3 April 2016Icon license.png (file)128 BGlauxosdever 1
05:30, 2 April 2016Exdos64.png (file)543 KBOmarrx024 1
07:32, 6 February 2016U365 0.6.png (file)19 KBCatnikita255 (U365 0.6)1
05:47, 17 January 2016CFS64.jpg (file)1.1 MBBellezzasolo (Screenshot of grub cfs64 module - ChaiOS file system.)1
17:40, 22 December 2015Shot10.jpg (file)65 KBAkasei 1
04:17, 13 December 2015ChaiOS sine.png (file)29 KBBellezzasolo (A screenshot of my OS)1
10:53, 11 November 2015OVMF run app.png (file)34 KBIntx13 1
09:45, 11 November 2015OVMF browse fs.png (file)33 KBIntx13 1
08:32, 11 November 2015OVMF shell.png (file)17 KBIntx13 1
00:57, 20 August 2015Wataha.png (file)12 KBAkasei 1
07:44, 28 April 2015Ghost-ui-preview.png (file)19 KBMax 1
15:26, 2 April 2015Vector shell.png (file)7 KBOmarrx024 (Screenshot of the Vector shell demonstrating the CPUID driver and the disk password.)1
14:28, 17 February 0.312.gif (file)20 KBAkasei 1
14:22, 17 February 2015Wataha 0.328.jpg (file)35 KBAkasei 1
10:36, 2 February 2015Vector desktop.png (file)13 KBOmarrx024 (Vector's GUI showing the CPUID driver)1
04:42, 24 January 2015Vector.png (file)59 KBOmarrx024 (Vector desktop demonstrating its window manager and toolkit)1
21:52, 14 December 2014Abbbab.png (file)18 KBSchol-r-lea 2
07:48, 8 December 2014ISBN 0321968972.jpg (file)180 KBArto (The Design and Implementation of the FreeBSD Operating System, 2nd ed.)1
09:49, 15 August 2014Rand spectrum.png (file)294 KBQuantumdude (Frequency spectrum of a standard LCG implementation of rand() versus an LFSR implementation.)1
16:50, 29 September 2013Compilers2.png (file)46 KBZondartul (The internals of your average compiler.)1
16:49, 29 September 2013Compilers1.png (file)18 KBZondartul (Overall view of what a compiler does, in most general terms.)1
17:54, 19 August 2013ISBN 0596009658.jpg (file)125 KBLove4boobies (Learning the bash Shell, 3rd ed.)1
03:30, 10 August 2013Metta bootup.png (file)49 KBDozniak 1
23:54, 8 August 2013Drama.png (file)3 KBKlange 1
15:15, 20 February 2013Multi-bus-PCI-host-controller-with-multiple-bridges.png (file)17 KBIntx13 (This figure illustrates a system with a PCI host controller that supports two buses, one of which has two bridges. To ensure that the two bridged expansion cards are accessible, a daisy-chain would need to be set up from the PCI host controller (either it)1
15:04, 20 February 2013Correct-flow-of-PCI-traffic.png (file)16 KBIntx13 (This figure illustrates how traffic really flows from the host controller to bridges and the devices they host. Bridges are daisy-chained until there is a single path from the host controller through every bridge.)1
15:00, 20 February 2013Incorrect-flow-of-PCI-traffic.png (file)17 KBIntx13 (Sadly this is NOT how traffic flows from a PCI host controller to devices connected to bridges. However, it simplifies things to start with this figure when introducing bridges.)1
14:48, 20 February 2013PCI-host-controller-and-single-bridge.png (file)9 KBIntx13 (In this illustration, a PCI host controller has three attached devices. One of those devices is a bridge, which has two attached devices. Traffic destined for one of the devices attached to the bridge flows from the host controller to the bridge and then )1
14:34, 20 February 2013PCI-host-controller-in-x86-architecture.png (file)20 KBIntx13 (In the x86 architecture, the PCI host controller is integrated into the Southbridge. The Processor/Northbridge/Southbridge, produced by a single vendor, exposes the PCI host controller (and, by extension, the PCI buses) to software via port-mapped IO, mem)1
14:28, 20 February 2013PCI-host-controller-as-software-interface.png (file)14 KBIntx13 (In modern systems the PCI host controller is often integrated into the CPU and exposes PCI buses to software via some CPU-specific IO mechanism, such as memory-mapped IO. This is in contrast with USB, where the USB host controller is connected to the CPU )1
14:06, 20 February 2013Lspci-with-multifunction-device-highlighted.png (file)65 KBIntx13 (This is the output of the "lspci" command on a Debian installation. The highlighted entries illustrate a multi-function PCI device that uses functions 0 and 1 on bus 0, slot 7. )1
11:29, 12 January 2013ARM RaspberryPi serial.jpg (file)179 KBMrvn (Connecting to the serial port on the Raspberry Pi)1
10:40, 30 November 2012ISBN 1118063333.jpg (file)71 KBLove4boobies (OS Concepts, 9th ed.)1
06:33, 29 November 2012ISBN 0201633612.jpg (file)93 KBLove4boobies (Design Patterns)1
06:19, 29 November 2012ISBN 0321637739.jpg (file)84 KBLove4boobies (APUE, 3rd ed.)1
07:18, 28 July 2012ISBN 0471117099.jpg (file)27 KBLove4boobies (Applied Crypto)1
07:14, 28 July 2012ISBN 071678291X.jpg (file)14 KBLove4boobies (Instructor's Manual for Language of Machines)1
23:20, 27 July 2012ISBN 0130525642.jpg (file)332 KBLove4boobies (Assemblers and Loaders)1
23:06, 27 July 2012ISBN 1588530000.jpg (file)44 KBLove4boobies (MMURTL V1.0)1

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