User:Gh975223/ARM

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The ARM architecture, is currently used in legacy Acorn Archimedes, Acorn RiscPC and PDA computers.


This page is under construction! This page is a work in progress and may thus be incomplete. Its content may be changed in the near future.


Registers

Name Number Function Callee must preserve?
R0-R12 general purpose registers
SP R13 stack pointer
R14 subroutine link register
PC R15 program counter
CPSR R16 state register


Register Set

System & User FIQ Supervisor Abort IRQ Undefined
R1 R1 R1 R1 R1 R1
R2 R2 R2 R2 R2 R2
R3 R3 R3 R3 R3 R3
R4 R4 R4 R4 R4 R4
R5 R5 R5 R5 R5 R5
R6 R6 R6 R6 R6 R6
R7 R7 R7 R7 R7 R7
R8 R8_fiq † R8 R8 R8 R8
R9 R9_fiq † R9 R9 R9 R9
R10 R10_fiq † R10 R10 R10 R10
R11 R11_fiq † R11 R11 R11 R11
R12 R12_fiq † R12 R12 R12 R12
R13 R13_fiq † R13_svc † R13_abt † R13_irq † R13_und †
R14 R14_fiq † R14_svc † R14_abt † R14_irq † R14_und †
R15 R15 R15 R15 R15 R15
CPSR CPSR CPSR CPSR CPSR CPSR
SPSR_fiq † SPSR_svc † SPSR_abt † SPSR_irq † SPSR_und †

† =Banked register


ARM710 CPO Register Set

Register Function R/W
0 Processor identification R
1 Control W
2 Translation Table Base W
3 Domain Access Control W
4 Reserved n/a
5 Page fault status / TLB flush R/W
6 Data fault address / TLB purge R/W
7 IDC flush W
8-15 Reserved n/a
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