User contributions
- 09:36, 7 May 2024 (diff | hist) m Serial Ports (Naming consistency (cont.)) (top)
- 09:35, 7 May 2024 (diff | hist) m Serial Ports (Naming consistency)
- 08:06, 7 May 2024 (diff | hist) m Serial Ports (Consistency)
- 00:44, 7 May 2024 (diff | hist) m Serial Ports (Fix mistake in Interrupt State section and flip table for bits 2-1 and 7-6)
- 23:12, 6 May 2024 (diff | hist) Serial Ports (Added First In / First Out Control Register and Interrupt Identification Register Sections (plus minor consistency edit))
- 21:29, 6 May 2024 (diff | hist) Serial Ports (Added a section for the Line Control Register along with a table for its bits. Also adjusted some section names regarding the LCR to all use "Bits" rather than inconsistent naming.)
- 18:19, 5 May 2024 (diff | hist) m Kernel Debugging (Fixed spelling mistake: bellow -> below) (top)