I/O Ports
An I/O port is usually used as a technical term for a specific address on the x86's IO bus. This bus provides communication with devices in a fixed order and size, and was used as an alternative to memory access. On many other architectures, there is no predefined bus for such communication and all communication with hardware is done via memory-mapped IO. This also increasingly happens on modern x86 hardware.
Looking for a list of ports
As an operating system developer, you should not be looking for this. "Standardized" I/O ports are only used in some situations, such as hardware that was present on pre-PCI (AT and compatible, etc.) PC hardware. Examples of devices using "standardized" I/O ports are the floppy drive, serial and parallel ports, However, most ports are claimed by plugin cards[which?] you might not have and some[which?] are even assigned via PNP which means that any port could be used for the device in question. If you want access to a device, you will need to look up the details for the device in question, and if some fixed port is involved, it will tell you. It is not technically feasible to have a complete mapping of ports to devices as you won't get access to it.
Port abuse
The original IBM PC decoded only the bottom 10 address bits for I/O ports, both on the motherboard and on IBM's expansion cards. That means that there are up to 64 port addresses mapping to the same port on the same device. Similarly, later devices (by IBM and others) chose to avoid conflict with the original PC devices by using a sparse register file. The bottom bits would be defined as constant, and the top bits would instead be used for the index. You would get ports number 0x82E8, 0x86E8, 0x8AE8 and so on. Such ISA devices are typically prone to interfering with PCI assigned IO addresses due to their spread.
Modern implementations of old devices (typically IDE and VGA controllers) have an implementation that is mentioned to be plug-and-play with moving registers, but they are still able to listen to legacy ports and respond accordingly.
The list
If you have found a port number and you are still wondering what it's meant to do, here's a list of the most common ports:
| Port range | Summary |
|---|---|
| 0x0000-0x001F | The first legacy DMA controller, often used for transfers to floppies. |
| 0x0020-0x0021 | The first Programmable Interrupt Controller |
| 0x0022-0x0023 | Access to the Model-Specific Registers of Cyrix processors. |
| 0x0040-0x0047 | The PIT (Programmable Interval Timer) |
| 0x0060-0x0064 | The "8042" PS/2 Controller or its predecessors, dealing with keyboards and mice. |
| 0x0070-0x0071 | The CMOS and RTC registers |
| 0x0080-0x008F | The DMA (Page registers) |
| 0x0092 | The location of the fast A20 gate register |
| 0x00A0-0x00A1 | The second PIC |
| 0x00C0-0x00DF | The second DMA controller, often used for soundblasters |
| 0x00E9 | Home of the Port E9 Hack. Used on some emulators to directly send text to the hosts' console. |
| 0x0170-0x0177 | The secondary ATA harddisk controller. |
| 0x01F0-0x01F7 | The primary ATA harddisk controller. |
| 0x0278-0x027A | Parallel port |
| 0x02F8-0x02FF | Second serial port |
| 0x03B0-0x03DF | The range used for the IBM VGA, its direct predecessors, as well as any modern video card in legacy mode. |
| 0x03F0-0x03F7 | Floppy disk controller |
| 0x03F8-0x03FF | First serial port |
| 0x0CF8 | Register CONFIG_ADDRESS of PCI Configuration Space Mechanism #1 |
| 0x0CFC | Register CONFIG_ADDRESS of PCI Configuration Space Mechanism #1 |