User contributions
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- 21:24, 5 February 2021 (diff | hist) N User:Gravaera/PCI Local Bus Commands (moved User:Gravaera/PCI Local Bus Commands to PCI Local Bus Commands: Imcomplete, but sufficient to be useful as a quick refresher to people who have already read the PCI legacy spec) (top)
- 21:24, 5 February 2021 (diff | hist) m PCI Local Bus Commands (moved User:Gravaera/PCI Local Bus Commands to PCI Local Bus Commands: Imcomplete, but sufficient to be useful as a quick refresher to people who have already read the PCI legacy spec)
- 21:22, 5 February 2021 (diff | hist) N User:Gravaera/PCI Local Bus Signals (moved User:Gravaera/PCI Local Bus Signals to PCI Local Bus Signals: Sufficiently complete to move into public space) (top)
- 21:22, 5 February 2021 (diff | hist) m PCI Local Bus Signals (moved User:Gravaera/PCI Local Bus Signals to PCI Local Bus Signals: Sufficiently complete to move into public space)
- 20:14, 10 December 2019 (diff | hist) m Why do I need a Cross Compiler? (typo to=>the)
- 17:46, 2 December 2019 (diff | hist) m Category:PCI Local Bus (Categorization) (top)
- 17:44, 2 December 2019 (diff | hist) m PCI Local Bus Signals
- 17:43, 2 December 2019 (diff | hist) m User:Gravaera/PCI Local Bus Device Adress Spaces (top)
- 17:43, 2 December 2019 (diff | hist) m PCI Local Bus Commands
- 17:43, 2 December 2019 (diff | hist) N Category:PCI Local Bus (Created page with "Category:PCI")
- 17:41, 2 December 2019 (diff | hist) m PCI Local Bus Signals (Categorization)
- 17:41, 2 December 2019 (diff | hist) m User:Gravaera/PCI Local Bus Device Adress Spaces (Categorization)
- 17:40, 2 December 2019 (diff | hist) m PCI Local Bus Commands
- 17:40, 2 December 2019 (diff | hist) PCI Local Bus Commands (→Memory Read Line and Memory Read Multiple)
- 17:40, 2 December 2019 (diff | hist) m PCI Local Bus Commands (Categorization)
- 17:38, 2 December 2019 (diff | hist) m PCI Local Bus Commands (Formatting cleanup)
- 02:32, 1 December 2019 (diff | hist) N User:Gravaera/PCI Local Bus Device Adress Spaces (Created page with "= Prologue = This page seeks to provide a quick reference for a person who has already read the PCI Local Bus Specification and is not meant to serve as an exhaustive descrip...")
- 02:26, 1 December 2019 (diff | hist) N PCI Local Bus Commands (Created page with "= Prologue = This page seeks to describe the PCI local bus commands -- these commands are sent over the C/BE signal pins from a master to a target. This page is not meant to...")
- 23:45, 10 November 2019 (diff | hist) m User:Gravaera/RISC-V Overview (top)
- 23:30, 2 September 2019 (diff | hist) N Talk:Tail Recursion and Tail Call Optimization (Created page with "Hey, I guess my question is, if this was incomplete, why not keep it in your own personal namespace? I could be misunderstanding the status and direction of this work, though....")
- 18:28, 12 August 2019 (diff | hist) m PCI Local Bus Signals (→Core Signals)
- 22:53, 7 August 2019 (diff | hist) ARM Generic Timer (Redirect to a more full bodied page which isn't RPi specific) (top)
- 22:52, 7 August 2019 (diff | hist) m ARMv7 Generic Timers
- 22:51, 7 August 2019 (diff | hist) N User:Gravaera/ARM Generic Timers (moved User:Gravaera/ARM Generic Timers to ARMv7 Generic Timers) (top)
- 22:51, 7 August 2019 (diff | hist) m ARMv7 Generic Timers (moved User:Gravaera/ARM Generic Timers to ARMv7 Generic Timers)
- 22:50, 7 August 2019 (diff | hist) m ARM SMMU versions 1 and 2 (Categorize) (top)
- 22:49, 7 August 2019 (diff | hist) N User:Gravaera/ARM SMMU versions 1 and 2 (moved User:Gravaera/ARM SMMU versions 1 and 2 to ARM SMMU versions 1 and 2: Mature enough that I can move it out into the global namespace now) (top)
- 22:49, 7 August 2019 (diff | hist) m ARM SMMU versions 1 and 2 (moved User:Gravaera/ARM SMMU versions 1 and 2 to ARM SMMU versions 1 and 2: Mature enough that I can move it out into the global namespace now)
- 02:55, 7 August 2019 (diff | hist) m PCI Local Bus Signals (→Core Signals)
- 02:54, 7 August 2019 (diff | hist) m PCI Local Bus Signals (→Core Signals)
- 02:53, 7 August 2019 (diff | hist) m PCI Local Bus Signals (→Core Signals)
- 02:53, 7 August 2019 (diff | hist) m PCI Local Bus Signals (PCI IRQ polarity and trigger mode)
- 02:51, 7 August 2019 (diff | hist) PCI Local Bus Signals
- 02:21, 7 August 2019 (diff | hist) PCI Local Bus Signals
- 01:41, 7 August 2019 (diff | hist) PCI Local Bus Signals
- 01:39, 7 August 2019 (diff | hist) m PCI Local Bus Signals (Fixup formatting)
- 01:36, 7 August 2019 (diff | hist) N PCI Local Bus Signals (Add a page to describe the most basic elements of the PCI local bus' signaling behaviour)
- 01:36, 23 May 2019 (diff | hist) User:Gravaera/Xilinx Ultrascale+ MPSoC (→Clocks) (top)
- 01:24, 23 May 2019 (diff | hist) User:Gravaera/Xilinx Ultrascale+ MPSoC
- 01:17, 23 May 2019 (diff | hist) User:Gravaera/Xilinx Ultrascale+ MPSoC (→Clocks)
- 01:17, 23 May 2019 (diff | hist) User:Gravaera/Xilinx Ultrascale+ MPSoC
- 01:46, 17 May 2019 (diff | hist) m User:Gravaera/Xilinx Ultrascale+ MPSoC
- 00:40, 17 May 2019 (diff | hist) N Xilinx Ultrascale+ MPSoC (moved Xilinx Ultrascale+ MPSoC to User:Gravaera/Xilinx Ultrascale+ MPSoC: I never meant for this to be in the global namespace in the first place; it's still a work in progress) (top)
- 00:40, 17 May 2019 (diff | hist) m User:Gravaera/Xilinx Ultrascale+ MPSoC (moved Xilinx Ultrascale+ MPSoC to User:Gravaera/Xilinx Ultrascale+ MPSoC: I never meant for this to be in the global namespace in the first place; it's still a work in progress)
- 00:39, 17 May 2019 (diff | hist) N User:Gravaera/Xilinx Ultrascale+ MPSoC (Created page with "= Boot process = The SoC has a CSU (Configuration and Security Unit) ROM. This ROM is executed first, and it then samples the "mode pins" (asserted by the chipset) which tell...")
- 08:58, 4 April 2019 (diff | hist) m ARM SMMU versions 1 and 2 (→Stream Matching Registers)
- 18:42, 3 April 2019 (diff | hist) Generic Interrupt Controller
- 23:55, 2 April 2019 (diff | hist) m ARM SMMU versions 1 and 2 (→Setup/Initialization related information)
- 23:50, 2 April 2019 (diff | hist) ARM SMMU versions 1 and 2 (→E2HC contexts (Section 2.10))
- 23:40, 2 April 2019 (diff | hist) ARM SMMU versions 1 and 2 (→TLB Maintenance)
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