User contributions for Gravaera
Jump to navigation
Jump to search
2 January 2025
- 19:5719:57, 2 January 2025 diff hist +33 m User:Gravaera/Building cross compiler with freestanding libsupc++ and libcpp Formatting: add line breaks current Tag: Visual edit
- 19:5619:56, 2 January 2025 diff hist +77 User:Gravaera/Building cross compiler with freestanding libsupc++ and libcpp Proper formatting Tag: Visual edit
22 December 2024
- 08:2408:24, 22 December 2024 diff hist +1,285 N User:Gravaera/Building cross compiler with freestanding libsupc++ and libcpp Created page with "It's simple really: $ ../gcc-14.2.0/configure --target=i586-elf --disable-nls --enable-languages=c,c++ --prefix=$(HOME)/bin/i586-elf --without-headers --with-static-standard-libraries --disable-hosted-libstdcxx --enable-libstdcxx-static-eh-pool --with-libstdcxx-eh-pool-obj-count=64 $ make -j8 all-gcc all-target-libgcc all-target-libstdc++-v3 --with-static-standard-libraries: Tells GCC's configure to build libgcc and libstdc++ as static libs (*.a, *.la). --disable-hoste..."
6 February 2021
- 02:2402:24, 6 February 2021 diff hist +36 N User:Gravaera/PCI Local Bus Commands moved User:Gravaera/PCI Local Bus Commands to PCI Local Bus Commands: Imcomplete, but sufficient to be useful as a quick refresher to people who have already read the PCI legacy spec current
- 02:2402:24, 6 February 2021 diff hist 0 m PCI Local Bus Commands moved User:Gravaera/PCI Local Bus Commands to PCI Local Bus Commands: Imcomplete, but sufficient to be useful as a quick refresher to people who have already read the PCI legacy spec
- 02:2202:22, 6 February 2021 diff hist +35 N User:Gravaera/PCI Local Bus Signals moved User:Gravaera/PCI Local Bus Signals to PCI Local Bus Signals: Sufficiently complete to move into public space current
- 02:2202:22, 6 February 2021 diff hist 0 m PCI Local Bus Signals moved User:Gravaera/PCI Local Bus Signals to PCI Local Bus Signals: Sufficiently complete to move into public space
11 December 2019
- 01:1401:14, 11 December 2019 diff hist +1 m Why do I need a Cross Compiler? typo to=>the
2 December 2019
- 22:4622:46, 2 December 2019 diff hist +19 m Category:PCI Local Bus Categorization current
- 22:4422:44, 2 December 2019 diff hist −17 m PCI Local Bus Signals No edit summary
- 22:4322:43, 2 December 2019 diff hist −17 m User:Gravaera/PCI Local Bus Device Adress Spaces No edit summary current
- 22:4322:43, 2 December 2019 diff hist −17 m PCI Local Bus Commands No edit summary
- 22:4322:43, 2 December 2019 diff hist +16 N Category:PCI Local Bus Created page with "Category:PCI"
- 22:4122:41, 2 December 2019 diff hist +45 m PCI Local Bus Signals Categorization
- 22:4122:41, 2 December 2019 diff hist +45 m User:Gravaera/PCI Local Bus Device Adress Spaces Categorization
- 22:4022:40, 2 December 2019 diff hist +45 m PCI Local Bus Commands No edit summary
- 22:4022:40, 2 December 2019 diff hist −45 PCI Local Bus Commands →Memory Read Line and Memory Read Multiple
- 22:4022:40, 2 December 2019 diff hist +45 m PCI Local Bus Commands Categorization
- 22:3822:38, 2 December 2019 diff hist 0 m PCI Local Bus Commands Formatting cleanup
1 December 2019
- 07:3207:32, 1 December 2019 diff hist +841 N User:Gravaera/PCI Local Bus Device Adress Spaces Created page with "= Prologue = This page seeks to provide a quick reference for a person who has already read the PCI Local Bus Specification and is not meant to serve as an exhaustive descrip..."
- 07:2607:26, 1 December 2019 diff hist +3,283 N PCI Local Bus Commands Created page with "= Prologue = This page seeks to describe the PCI local bus commands -- these commands are sent over the C/BE signal pins from a master to a target. This page is not meant to..."
11 November 2019
- 04:4504:45, 11 November 2019 diff hist 0 m User:Gravaera/RISC-V Overview No edit summary current
3 September 2019
- 04:3004:30, 3 September 2019 diff hist +232 N Talk:Tail Recursion and Tail Call Optimization Created page with "Hey, I guess my question is, if this was incomplete, why not keep it in your own personal namespace? I could be misunderstanding the status and direction of this work, though...."
12 August 2019
- 23:2823:28, 12 August 2019 diff hist +128 m PCI Local Bus Signals →Core Signals
8 August 2019
- 03:5303:53, 8 August 2019 diff hist −1,151 ARM Generic Timer Redirect to a more full bodied page which isn't RPi specific current
- 03:5203:52, 8 August 2019 diff hist +18 m ARMv7 Generic Timers No edit summary
- 03:5103:51, 8 August 2019 diff hist +34 N User:Gravaera/ARM Generic Timers moved User:Gravaera/ARM Generic Timers to ARMv7 Generic Timers current
- 03:5103:51, 8 August 2019 diff hist 0 m ARMv7 Generic Timers moved User:Gravaera/ARM Generic Timers to ARMv7 Generic Timers
- 03:5003:50, 8 August 2019 diff hist +18 m ARM SMMU versions 1 and 2 Categorize current
- 03:4903:49, 8 August 2019 diff hist +39 N User:Gravaera/ARM SMMU versions 1 and 2 moved User:Gravaera/ARM SMMU versions 1 and 2 to ARM SMMU versions 1 and 2: Mature enough that I can move it out into the global namespace now current
- 03:4903:49, 8 August 2019 diff hist 0 m ARM SMMU versions 1 and 2 moved User:Gravaera/ARM SMMU versions 1 and 2 to ARM SMMU versions 1 and 2: Mature enough that I can move it out into the global namespace now
7 August 2019
- 07:5507:55, 7 August 2019 diff hist 0 m PCI Local Bus Signals →Core Signals
- 07:5407:54, 7 August 2019 diff hist +64 m PCI Local Bus Signals →Core Signals
- 07:5307:53, 7 August 2019 diff hist +6 m PCI Local Bus Signals →Core Signals
- 07:5307:53, 7 August 2019 diff hist +84 m PCI Local Bus Signals PCI IRQ polarity and trigger mode
- 07:5107:51, 7 August 2019 diff hist +3,284 PCI Local Bus Signals No edit summary
- 07:2107:21, 7 August 2019 diff hist +4,642 PCI Local Bus Signals No edit summary
- 06:4106:41, 7 August 2019 diff hist +276 PCI Local Bus Signals No edit summary
- 06:3906:39, 7 August 2019 diff hist −16 m PCI Local Bus Signals Fixup formatting
- 06:3606:36, 7 August 2019 diff hist +2,888 N PCI Local Bus Signals Add a page to describe the most basic elements of the PCI local bus' signaling behaviour
23 May 2019
- 06:3606:36, 23 May 2019 diff hist +468 User:Gravaera/Xilinx Ultrascale+ MPSoC →Clocks current
- 06:2406:24, 23 May 2019 diff hist +533 User:Gravaera/Xilinx Ultrascale+ MPSoC No edit summary
- 06:1706:17, 23 May 2019 diff hist −663 User:Gravaera/Xilinx Ultrascale+ MPSoC →Clocks
- 06:1706:17, 23 May 2019 diff hist +1,458 User:Gravaera/Xilinx Ultrascale+ MPSoC No edit summary
17 May 2019
- 06:4606:46, 17 May 2019 diff hist +272 m User:Gravaera/Xilinx Ultrascale+ MPSoC No edit summary
- 05:4005:40, 17 May 2019 diff hist +52 N Xilinx Ultrascale+ MPSoC moved Xilinx Ultrascale+ MPSoC to User:Gravaera/Xilinx Ultrascale+ MPSoC: I never meant for this to be in the global namespace in the first place; it's still a work in progress current
- 05:4005:40, 17 May 2019 diff hist 0 m User:Gravaera/Xilinx Ultrascale+ MPSoC moved Xilinx Ultrascale+ MPSoC to User:Gravaera/Xilinx Ultrascale+ MPSoC: I never meant for this to be in the global namespace in the first place; it's still a work in progress
- 05:3905:39, 17 May 2019 diff hist +726 N User:Gravaera/Xilinx Ultrascale+ MPSoC Created page with "= Boot process = The SoC has a CSU (Configuration and Security Unit) ROM. This ROM is executed first, and it then samples the "mode pins" (asserted by the chipset) which tell..."
4 April 2019
3 April 2019
- 23:4223:42, 3 April 2019 diff hist +342 Generic Interrupt Controller No edit summary