User contributions
- 03:31, 27 July 2016 (diff | hist) User:New16
- 13:56, 25 July 2016 (diff | hist) m User Interface (added link to "Text UI")
- 13:53, 25 July 2016 (diff | hist) m Text UI (style)
- 13:51, 25 July 2016 (diff | hist) m Command Line (style, deleted "no multitasking" part since its possible)
- 13:48, 25 July 2016 (diff | hist) m User Interface (style)
- 13:46, 25 July 2016 (diff | hist) User Interface (included other types of UI's)
- 13:07, 25 July 2016 (diff | hist) m Global Descriptor Table (added reference to "LGDT")
- 13:04, 25 July 2016 (diff | hist) m LGDT (changed dd to dq, so one can use the code in long-mode)
- 12:53, 25 July 2016 (diff | hist) Talk:Global Descriptor Table
- 12:46, 25 July 2016 (diff | hist) m Global Descriptor Table (source 2 outdated: chapter 4 refer to "PAGING", update to chapter 2.4 reffering to "MEMMORY-MANAGEMENT REGISTERS")
- 12:40, 25 July 2016 (diff | hist) m CISC, RISC, and other CPU Architecture Concepts (redirect to "Instruction Set Architecture") (top)
- 07:34, 25 July 2016 (diff | hist) m Category:CPU Registers (added to x86) (top)
- 07:30, 25 July 2016 (diff | hist) Talk:CPU Registers x86-64 (top)
- 07:03, 25 July 2016 (diff | hist) m CPU Registers x86-64
- 06:42, 25 July 2016 (diff | hist) m CPU Registers x86-64 (corrected values)
- 17:27, 23 July 2016 (diff | hist) m X86-64 (grammar)
- 17:14, 23 July 2016 (diff | hist) Talk:CPU Registers x86-64
- 17:01, 23 July 2016 (diff | hist) N Talk:Model Specific Registers (Created page with "MTRR-part missing --~~~~") (top)
- 16:56, 23 July 2016 (diff | hist) m Instruction Set Architecture (linked to "Historical Notes on CISC and RISC")
- 16:48, 23 July 2016 (diff | hist) N Talk:Instruction Set Architecture (suggestion) (top)
- 16:39, 23 July 2016 (diff | hist) Instruction Set Architecture (wrote something about the basic concepts, still a stub)
- 16:25, 23 July 2016 (diff | hist) User:New16
- 16:23, 23 July 2016 (diff | hist) User:New16
- 16:17, 23 July 2016 (diff | hist) User:New16
- 13:36, 23 July 2016 (diff | hist) User:New16
- 11:45, 23 July 2016 (diff | hist) User:New16
- 11:45, 23 July 2016 (diff | hist) User:New16
- 11:03, 23 July 2016 (diff | hist) m ISA (linked to "Instruction Set Architecture")
- 06:59, 23 July 2016 (diff | hist) m Boot Sequence (naming)
- 06:58, 23 July 2016 (diff | hist) Boot Signature (since its not listed anyway: redirected to "Boot Sequence#Master Boot Record") (top)
- 06:52, 23 July 2016 (diff | hist) m Boot Sequence (added boot signature sentence to "Master Boot Record")
- 06:40, 23 July 2016 (diff | hist) m Boot Signature (added term "magic number")
- 06:26, 23 July 2016 (diff | hist) m A20 Line (spelling)
- 06:25, 23 July 2016 (diff | hist) A20 Line (reworked section "INT 15, 2401")
- 05:55, 23 July 2016 (diff | hist) Endianness
- 05:53, 23 July 2016 (diff | hist) User:New16
- 05:49, 23 July 2016 (diff | hist) User:New16
- 05:47, 23 July 2016 (diff | hist) User:New16
- 05:40, 23 July 2016 (diff | hist) User:New16
- 05:39, 23 July 2016 (diff | hist) User:New16
- 05:38, 23 July 2016 (diff | hist) User:New16
- 04:52, 23 July 2016 (diff | hist) User:New16
- 04:40, 23 July 2016 (diff | hist) User:New16
- 04:31, 23 July 2016 (diff | hist) User:New16
- 04:21, 23 July 2016 (diff | hist) User:New16
- 03:40, 23 July 2016 (diff | hist) User:New16
- 03:38, 23 July 2016 (diff | hist) User:New16
- 03:37, 23 July 2016 (diff | hist) N User:New16 (Created page with "Endianness refers to the order in which bytes of a multi-byte structure are placed to main memory (RAM). The bit order in any byte is normally from bit seven downto bit zero a...")