AMD Atombios

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A pointer to the AMD Atombios may be found in either the BAR0 or expansion ROM fields in the PCI config space of most current AMD graphics cards, as well as AMD's integrated graphics processors.



To use execute the commands in the command tables, one needs to write an Atombios Bytecode interpreter. Example Atombios interpreter code can be found in the Linux source tree in drivers/gpu/drm/radeon. Check around in the files atom.c and atom.h. One of the first commands one would need to issue is the ASIC_Init command at index 0, which initializes the ASIC (Application Specific Integrated Circuit). These commands provide an API for the driver to configure the graphics card without necessarily knowing the specific registers and values to write.


The data table points to other tables which give useful information about the graphics card, like the engine, memory and reference clocks.


All offsets are from the beginning of the ROM image. To find the offsets of other tables, see this table, with some important fields:

Offset Size Description
0x00 Word BIOS Magic, should be 0xAA55
0x30 10 bytes ATI Magic, should be " 761295520"
0x48 Word Atom ROM Table Base

Common Header

Most tables will have a header with the following structure:

Offset Size Description
0x00 Word Structure Size
0x02 Byte Table Format Revision, changed when parser is not backward compatible
0x03 Byte Table Content Revision

Atom ROM table

Offset Size Description
0x00 4 bytes Common header
0x04 4 bytes Atom Magic, should be "ATOM"
0x08 Word BIOS Runtime Segment Address
0x0A Word Protected Mode Info Offset
0x0C Word Config Filename Offset
0x0E Word CRC Block Offset
0x10 Word Name String offset, sometimes zero terminated. Maximum 512 bytes.
0x12 Word Int 10 offset
0x14 Word PCI Bus Device Init Code
0x16 Word IO Base Address
0x18 Word Subsystem Vendor ID
0x1A Word Subsystem ID
0x1C Word PCI Info Offset
0x1E Word Command Table Base
0x20 Word Data Table Base
0x22 Byte Extended Function Code
0x23 Byte Reserved

Command Table

The offset for this table is found at offset 0x1E of the Atom ROM table. Many of these tables are only internally between functions. All of the values in this table are offsets from the start of the ROM image, except for the header.

Offset Size Description
0x00 4 bytes Common Header
0x04 x words Array offsets of commands. See AMD Atombios Commands for a list of commands.

Command Format

Offset Size Description
0x00 Word Command Length
0x02 Word Reserved
0x04 Byte WS?
0x05 Byte PS - Parameter Stack
0x06-0x???? ?? Command bytecode

Data Table

The offset for this table is found at offset 0x20 of the Atom ROM table. All of the values in this table are offsets from the beginning of the ROM.

Offset Size Description
0x00 4 bytes Common Header
0x04 Word UtilityPipeline
0x06 Word MultimediaCapabilityInfo
0x08 Word MultimediaConfigInfo
0x0A Word StandardVesa_Timing
0x0C Word FirmwareInfo
0x0E Word PaletteData
0x10 Word LCD_Info
0x12 Word DIGTransmitterInfo
0x14 Word AnalogTV_Info
0x16 Word SupportedDevicesInfo
0x18 Word GPIO_I2C_Info
0x1A Word VRAM_UsageByFirmware
0x1C Word GPIO_Pin_LUT
0x1E Word VESA_ToInternalModeLUT
0x20 Word ComponentVideoInfo
0x22 Word PowerPlayInfo
0x24 Word CompassionateData
0x26 Word SaveRestoreInfo
0x28 Word PPLL_SS_Info
0x2A Word OemInfo
0x2C Word XTMDS_Info
0x2E Word MclkSS_Info
0x30 Word Object_header
0x32 Word IndirectIOAccess
0x34 Word MC_InitParameter
0x36 Word ASIC_VDDC_Info
0x38 Word ASIC_InternalSS_Info
0x3A Word TV_VideoMode
0x3C Word VRAM_Info
0x3E Word MemoryTrainingInfo
0x40 Word IntegratedSystemInfo
0x42 Word ASIC_ProfilingInfo
0x44 Word VoltageObjectInfo
0x46 Word PowerSourceInfo

Firmware Info

The offset for this table is found at offset 0x0C of the Data Table. Clock values are in 10KHz units. This table has many versions, but many of the fields are the same. In versions other than 1.1, only the changed fields will be listed.

Version 1.1

Offset Size Description
0x00 4 bytes Common Header
0x04 Dword Firmware Revision
0x08 Dword Default Engine Clock
0x0C Dword Default Memory Clock
0x10 Dword Driver Target Engine Clock
0x14 Dword Driver Target Memory Clock
0x18 Dword Max Engine Clock PLL Output
0x1C Dword Max Memory Clock PLL Output
0x20 Dword Max Pixel Clock PLL Output
0x24 Dword ASIC Max Engine Clock
0x28 Dword ASIC Max Memory Clock
0x2C Byte ASIC Max Temperature
0x2D 15 bytes Reserved
0x3C Word Min Engine Clock PLL Input
0x3E Word Max Engine Clock PLL Input
0x40 Word Min Engine Clock PLL Output
0x42 Word Min Memory Clock PLL Input
0x44 Word Max Memory Clock PLL Input
0x46 Word Min Memory Clock PLL Output
0x48 Word Max Pixel Clock
0x4A Word Min Pixel Clock PLL Input
0x4C Word Max Pixel Clock PLL Input
0x4E Word Min Pixel Clock PLL Output
0x50 Word Firmware Capability
0x52 Word Reference Clock
0x54 Word RTS PM4 Starting Location in ROM, in 1kb units
0x56 Byte RTS PM4 Packets, in 1kb units
0x57 Byte Design ID
0x58 Byte Memory Module ID
0x59 3 bytes Reserved

Version 1.2

Offset Size Description
0x2D Byte MinAllowedBL_Level
0x38 Dword MinPixelClockPLL_Output
0x4E Word MinPixelClockPLL_Output, lower 16bits of field at 0x38

Version 1.3

Offset Size Description
0x34 Word 3D Acceleration Engine Clock

Version 1.4

Offset Size Description
0x2E Word BootUpVDDCVoltage, in mV
0x30 Word LcdMinPixelClockPLL_Output, in MHz
0x32 Word LcdMaxPixelClockPLL_Output, in MHz

Version 2.1

Offset Size Description
0x10 8 bytes Reserved (was DriverTargetEngineClock and DriverTargetMemoryClock)
0x24 Dword BinaryAlteredInfo (was ASICMaxEngineClock)
0x28 Dword DefaultDispEngineClkFreq (was ASICMaxTemperature)
0x2C Byte Reserved (was ASICMaxTemperature)
0x34 Dword Reserved (was 3D Acceleration Engine Clock)
0x52 Word CoreReferenceClock (was ReferenceClock)
0x54 Word MemoryReferenceClock (was RTS PM4 Location)
0x56 Word UniphyDPModeExtClkFreq (was RTS PM4 Packets)


This page is under construction! This page or section is a work in progress and may thus be incomplete. Its content may be changed in the near future.


Pneumonic Opcode Description
Invalid 0x00 NULL
MOV 01-06 Move
AND 07-0C Logical And
OR 0D-12 Logical Or
SHL 13-18 Shift Left
SHR 19-1E Shift Right
MUL 1F-24 Multiply
DIV 25-2A Divide
ADD 2B-30 Add
SUB 31-36 Subtract
SETPORT [ATI] 37 Set Port (ATI)
SETPORT [PCI] 38 Set Port (PCI)
SETPORT [SYSIO] 39 Set Port (Sysio)
SETREGBLOCK 3A Set Register Block
SETFBBASE 3B Set Framebuffer Base
CMP 3C-41 Compare
SWTICH 42 Switch
JMP 43-49 Jump [Condition]
TEST 4A-4F Test
Delay [Milli] 50 Millisecond Delay
Delay [Micro] 51 Microsecond Delay
CALLTABLE 52 Call Table
REP 53 Repeat
CLEAR 54-59 Clear
NOP 5A No Operation
EOT 5B Functionally NOP
MASK 5C-61 Mask
POSTCARD 62 Poscard
BEEP 63 Beep
SAVEREG 64 Save Register
RESTOREREG 65 Restore Register
SETDATABLOCK 66 Set Data Block
XOR 67-6C Exclusive OR
SHL 6D-72 Shift Left
SHR 73-78 Shift Right
DEBUG 79 Debug

Arguments and Conditions

From the AMD Linux interpreter:

#define ATOM_ARG_REG		0
#define ATOM_ARG_PS		1
#define ATOM_ARG_WS		2
#define ATOM_ARG_ID		4
#define ATOM_ARG_FB		3
#define ATOM_ARG_IMM		5
#define ATOM_ARG_PLL		6
#define ATOM_ARG_MC		7

However, when dealing with a block of instructions of length 6, the encoding is as follows:

Offset Argument Description
00 ATOM_ARG_REG Register Argument
03 ATOM_ARG_FB Framebuffer?
04 ATOM_ARG_PLL PLL Register. 8 byte index.
05 ATOM_ARG_MC MC Register


Offset Condition Description
00 ATOM_COND_ALWAYS Unconditional
03 ATOM_COND_ABOVE Greater Than

See Also

External Links

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