ARM Integrator-CP ITPTMME Main

ARM Tutorial Series By Demonstration And Explanation

This consists of a series of pages building a minimal kernel and OS specifically for the ARM architecture. Each page builds on the previous state of the kernel. By following each step you should eventually reach a point of a functional kernel. The design is of a micro-kernel and follows a non-standard design which aims to keep the reader interested and challenges them to solve non-standard problems. Each step does not provide a linear progression, but instead demonstrates minimal and sometimes non-optimal solutions in order to slowly increase the functionality and performance of the kernel. At specific points a system may be replaced with a better one leaving the reader with the choice of replacing something and continuing forward or keeping the original design and deviating from the series or allows them to integrate back into the series at some point if they deviate.

Most explanations are provided in code if they are simplistic, and more complicated systems or code blocks are described both in code and text. The reader is assumed to have an adequate understanding of assembly and the C language. Also GCC, binutils, and QEMU are expected.

I use some specific features of GCC to produce code and I apologize if you use a different compiler, but GCC is ported to many operating systems and is widely available making it an attractive choice. It is also full featured.

Different hardware than that provided by the Integrator-CP board can be used but will require slightly changing hardware implementation code. I expect to completely remove the hardware dependent code from the kernel at later stages and incorporate modules to provide hardware in a common interface for the kernel to use (example of PIC and timers used for scheduling). However, this would complicate the demonstrations too early in the beginning stages so it is delayed until later. It should also be noted that the hardware dependent code is very minimal and localized.

The only hardware used by the kernel is the PIC and timer for task switching. Just about any board or SoC should come with some kind of timer but it may be slightly different in how you program it. The PIC can also be different, but generally its going to be very similar and only a few lines of code are needed to talk to it (same with timer). So do not become discouraged if you use a different board. As I stated I will eventually move the code external to the kernel sometime after module loading, and may incorporate both the PIC and timer into one module. Normally, user applications do not care what timer is used as long as it provides the required accuracy and hardware really does not care how interrupts are mapped as long as it can handle the interrupt making the PIC and timer a nice set to just combine into a single module for the SoC or board.

Later parts of the series provide full code from a GIT repository, but are designed with the hope that everything can be implemented by reading the page alone, and the repository is provided instead for the reader to see a working implementation if they run into difficulties in implementing the functionality displayed by the code or explained by the text. This allows the reader to download a working copy and actually see it working and then inspect it.

The reader is also expected to not rely solely on the methods and designs used but instead supplement their learning by using other sources of development and design material such as other tutorials, books, courses, and readings. This is because the methods and designs used in the series are not expected to be optimal, viable, or realistic but instead be adequate to demonstrate a kernel and operating system that has a sufficient amount of functionality to be usable in an educational or research type manner.

I might make mistakes in my implementations and I want you the reader to understand that you need to consult external sources and do your own thinking. My goal is simply to get you into it and to a point where you feel like branching off and doing your own design. Also part of that goal is providing you with a hard example of doing something in the event you run into trouble getting something to work such as exception tables, interrupts, task switching, virtual memory, hardware, and many other things. I also encourage you to put your own twist on things but if you like to copy and paste then you are welcome to do so.

If you are looking for the standard, accepted, normal, correct, or proven designs and methods then this serial of tutorials may not be what you want. If you are looking for an interesting and different approach to development of a kernel suited to someone who does this as a hobby then this is the right place for you.

Many people frown on using code to explain things, but I am a code kind of guy. I can read code faster than an explanation and maybe that is because I have been coding in C for many years. I can also read documentation too, but when I see an example in code it just clicks for me faster because I literally see a practical implementation of something. Since this is being written in assembly and C it is just natural that anyone who is going to follow along and comprehend be proficient in C (or at least willing to learn). By all means if your new to C and assembly do not let me discourage you because learning to read code now is better than later, and it actually helps you learn to read your own code well which helps with debugging.

Step	Page	Description
1	IRQ, Timer, And PIC	Basic system software demonstrating handling IRQs with timer and PIC.
2	IRQ, Timer, PIC, And Tasks	Added ability to run tasks using timer.
3	IRQ, Timer, PIC, Tasks, And MM	Added memory management and virtual memory support. Identity mapped kernel.
4	IRQ, Timer, PIC, Tasks, MM (Paged Kernel)	More advanced and flexible virtual memory support with paged kernel.
5	Attached Modules And Minimal ELF Loading	Usage of modules attached to kernel image, and loading of ELF32 modules into protected user address space.
6	Tasks To Processes And Threads With System Calls	Addition of process and thread design with minimal system calls for demonstration.