Physical Address Extension
This article discusses the Physical Address Extension (PAE) available on many x86 processors. It assumes good understanding of virtual memory (as discussed in Paging). It also discusses features specific to x86, although other architectures could easily have very similar mechanisms.
The PAE bit was introduced in the Intel Pentium Pro processor. It was specifically aimed at allowing 32 bit operating systems to make use of more than 4 GB of memory.
How It Works
When the PAE bit is off, each entry in the page table specifies a 32 bit base address into physical memory. When the bit is on, the entry is expanded to allow up to 64 bits (although most processors support less than this amount). This allows a process to be located above the 4 GB boundary, but a 32-bit process cannot access more than 4 GB at any time.
Dangers and Pitfalls
32 bit I/O devices (and driver code) will most likely not understand addresses above 4 GB.
This creates a "hole", as some of the address space is set aside for these drivers (see Memory Map (x86)). You may be able to remap DRAM from this region to a space above 4 GB, or the storage may be lost.
There is additional complexity with DMA (how can your 32 bit hard disk driver copy code or data for a process located above 4 GB?).
These difficulties often drive OS developers to work in a flat 64 bit address space.
Enabling PAE is required when switching into Long Mode. The structures remain the same. The main difference being that code based at physical address 0 can access all of memory using 64 bit pointers.
- PAE at Wikipedia