User contributions
- 14:36, 16 May 2022 (diff | hist) User:Demindiro/Porting Rust standard library (Important note about rustc-dep-of-std w.r.t. global state) (top)
- 14:22, 16 May 2022 (diff | hist) m User:Demindiro/Porting Rust standard library (Add rating)
- 08:50, 15 May 2022 (diff | hist) User:Demindiro (top)
- 12:54, 10 May 2022 (diff | hist) m SYSENTER (Explicitly note that SS is still loaded from STAR 63:48 + 8. Thanks AMD) (top)
- 15:39, 7 March 2022 (diff | hist) CPU Registers x86-64 (→CR4: FSGSBASE) (top)
- 11:46, 23 February 2022 (diff | hist) User:Demindiro/Porting Rust standard library (→Integrating a crate: Forgot quite important package section, whoops.)
- 11:41, 23 February 2022 (diff | hist) User:Demindiro/Porting Rust standard library (→Runtime)
- 10:46, 21 February 2022 (diff | hist) m User:Demindiro/Porting Rust standard library (Add Rust category)
- 10:45, 21 February 2022 (diff | hist) User:Demindiro
- 10:43, 21 February 2022 (diff | hist) N User:Demindiro/Porting Rust standard library (Initial "I finally figured it out! Kinda...")
- 13:57, 12 October 2021 (diff | hist) CPU Registers x86 (→General Purpose Registers: 8 bit sil, dil, bpl, spl)
- 12:04, 27 September 2021 (diff | hist) Interrupt Descriptor Table (→Structure AMD64: clarify GateType in long mode (see Intel manual 6.14.1))
- 14:50, 16 September 2021 (diff | hist) m Bochs (s/commads/commands) (top)
- 05:54, 30 August 2021 (diff | hist) User:Demindiro
- 13:45, 16 August 2021 (diff | hist) User:Demindiro/SBI (I messed up and accidently used MAX instead of MIN) (top)
- 12:47, 16 August 2021 (diff | hist) User:Demindiro/SBI (Important note about QEMU being buggy)
- 23:54, 13 August 2021 (diff | hist) m User:Demindiro/SBI (Add to RISC-V category)
- 23:53, 13 August 2021 (diff | hist) m PLIC (Add to RISC-V category) (top)
- 20:14, 13 August 2021 (diff | hist) N User:Demindiro/SBI (Initial page on SBI. Describes a caveat with sbi_set_timer)
- 14:30, 12 August 2021 (diff | hist) User:Demindiro (Blanked the page)
- 14:28, 12 August 2021 (diff | hist) N User:Demindiro (moved User:Demindiro to User:Demindiro/RISC-V Notes)
- 14:28, 12 August 2021 (diff | hist) m User:Demindiro/RISC-V Notes (moved User:Demindiro to User:Demindiro/RISC-V Notes) (top)
- 14:19, 12 August 2021 (diff | hist) N User:Demindiro/PLIC (moved User:Demindiro/PLIC to PLIC: It should be decently informative enough to get people going.) (top)
- 14:19, 12 August 2021 (diff | hist) m PLIC (moved User:Demindiro/PLIC to PLIC: It should be decently informative enough to get people going.)
- 14:18, 12 August 2021 (diff | hist) m PLIC (Mark the page as a stub)
- 14:11, 12 August 2021 (diff | hist) m PLIC (Rewrite to prevent the use of "you")
- 14:06, 12 August 2021 (diff | hist) PLIC (Elaborate on handling interrupts, remove "you".)
- 05:27, 10 August 2021 (diff | hist) PLIC (Add link RISC-V manual with more information about the PLIC.)
- 05:08, 10 August 2021 (diff | hist) N PLIC (First draft about PLIC. I'm still figuring out how to properly handle the interrupts though.)
- 02:49, 29 July 2021 (diff | hist) User:Demindiro/RISC-V Notes (Add a note regarding an issue with using toolchains)
- 18:34, 17 June 2021 (diff | hist) User:Demindiro/RISC-V Notes (Replace syntax highlight with pre)
- 01:51, 14 June 2021 (diff | hist) N User:Demindiro/RISC-V Notes (Created page with "== RISC-V, PCI and setting valid BARs == In my hairloss-inducing adventure of getting PCI to work I've found I missed an important detail that doesn't seem to be mentioned an...")
