Talk:Descriptor Cache

Cleanup

The terminology on this page needs a cleanup.

Inside the CPU, a segment register has a visible part (the "value" of it) and a hidden part (base, limit, attributes). Both the visible and hidden part is loaded during a segment register load (either from the GDT/LDT in protected mode, or from default/computed value in real mode). For protected/long mode, there is no reason for the GDT/LDT descriptor to exist except during segment register loads. For real mode the descriptor never existed.

A cache is something that keeps a copy of something that exists elsewhere; where modifying the actual thing causes the cache to be invalidated/updated to reflect those changes. The hidden part of segment registers are not a cache because they do not necessarily hold a copy of information that exists elsewhere and will not be invalidated or updated when the original information changes.

Essentially what I'm saying is that the "descriptor caches" are not caches (and are much more like registers), and therefore should not be called "descriptor caches".

- Brendan (please remember to sign)

Perhaps we should just merge this page into Segmentation or something similar instead? The only thing which links here is Unreal mode which already explains the way the segment registers are used in unreal mode anyway (although we would also have to update that as its using similar terminology). John 15:51, 16 November 2012 (CST)

I'll bounce back the terminology use: caches are about storing copies in places that are faster to access. They are not at all required to be coherent, the TLB isn't after all, and having caching enabled on MMIO/device ram makes that part of it just as incoherent as well. Specifically, the terminology in question is actually used in the official manual. From Intel 3A §3.4.3:

Every segment register has a “visible” part and a “hidden” part. (The hidden part is sometimes referred to as a “descriptor cache” or a “shadow register.”)

I also found some diagrams around the manual about the mechanics of segmentation that display a lookup in the GDT in cases where the hidden part is actually used. Not being aware of the cache-like mechanism has yielded several discussions on the forums where people claim a change in the GDT would take immediate effect - with interesting consequences when the situation is ridiculed by asking those people what would happen after one sets CR0.PE. At any rate, the page exists to deal with that specific misunderstanding among newbies and oldtimers alike, and most references here are coming from forum replies. (As a consquence, keep those links working if you do decide to change something)

- Combuster 14:26, 25 November 2012 (CST)